In this modern era, the electronics industry is incomplete without microprocessors. From daily household appliances to space exploration – microprocessors are accompanying us everywhere and making lives way easier. But, independently designing and manufacturing a processor is an extremely complicated task and done by only a few countries like the US, Italy, France, Japan, Taiwan, Singapore, Malaysia, etc. India was not in the list, that’s until recently IIT Bombay, one of India’s premier technology institute developed the country’s first-ever indigenously-built SPARC ISA architecture based microprocessor called AJIT, led by Prof. Madhav Desai.
Here’s a quick introduction of microprocessor: A microprocessor is an IC comprises of millions or more transistors and function as the controlling unit of a micro-computer, fabricated on a small chip capable of performing ALU (Arithmetic Logical Unit) operations and communicating with the other devices connected to it. Microprocessor consists of an ALU, register array, and a control unit.
This project by IIT Bombay comes under the Government of India’s “Make In India” initiative which encourages both multinational and domestic companies to design and manufacture products within the country to make India a global manufacturing hub. The name “AJIT” is not an acronym and is derived from Sanskrit, meaning “Someone who has not been conquered“. As far as I could gather information, the AJIT microprocessor uses SPARCISA architecture. SPARC (Scalable Processor Architecture) is a reduced instruction set computing (RISC) instruction set architecture (ISA) originally developed by Sun Microsystems.
This 32-bit microprocessor is clocked at around 70-120 MHz, features an arithmetic logic unit (ALU), a memory management unit, a floating point unit (FPU) for high-speed floating point operations, and also a hardware debugger unit. As per the researchers associated with development, a clock speed of 400-500MHz is obtainable in the next upgrade. AJIT is a 180nm technology-based chip, but the researchers plan to move to a 65nm process eventually. They published the tool AHIR-V2 which used in this project on GitHub.