VXO – based PLL frequency synthesizer for 7 MHz


In EMRFD, 4.10, Wes provides the schema for a versatile VXO – extending frequency synthesizer. Although, I referred him to Wes for help, a reader asked me some questions and I ended up designing some pieces for him. In order to test some of my ideas, I made a VXO – based synthesizer that tuned from 6.99 to 7.103 MHz using only parts I had in stock.

For those interested, here’s some project schematics, notes and images:

Above — Block out of the synthesizer.


Above — Schematic of the reference oscillator. I’ve discussed this circuit before here

Above — Output of the 1 MHz CMOS clock applied as the reference oscillator. Initially, I planned to divide a 2 MHz crystal oscillator in half with a flip-flop circuit, but remembered that someone sent me some high-grade 1 MHz clocks a few years ago.

Above — A test of the entire circuit with the 4 switches configured 0001 for divide by 3.


To make a VXO to mix with a ~7 MHz VCO, you’ll need a crystal that is higher in frequency than the highest frequency you want to synthesize. Some rummaging revealed a bag of 21.4773 MHz crystals that I could divide by 3 to garner 7.159 MHz.

To afford a reasonable delta F, three were placed in the super VXO fashion and I applied the smallest amount of series inductance that would ensure a reasonable delta F with solid frequency stability.

Above — The schematic of my VXO. Through experiments I determined that 3 crystals and the inductance shown gave a stable ~30 KHz swing in frequency when divided by 3. A BD139 with low flicker noise gets buffered, digitized and then buffered again by a single inverter crafted by an AND gate.

The simple divide by 3 circuit lacks a 50% duty cycle, but worked OK. A low cutoff frequency low-pass filter serves to clean up the waveform, plus attenuate the output signal so that it is somewhere between 200 and 300 mV peak to peak to chop the NE612 mixer without excessive distortion in the mixer output.

Dividing by 3 drops the raw VXO range by 1/3, the phase noise by ~ 9.5 dB and also reduces frequency drift even further.

Read more: VXO – based PLL frequency synthesizer for 7 MHz

About The Author

Ibrar Ayyub

I am an experienced technical writer holding a Master's degree in computer science from BZU Multan, Pakistan University. With a background spanning various industries, particularly in home automation and engineering, I have honed my skills in crafting clear and concise content. Proficient in leveraging infographics and diagrams, I strive to simplify complex concepts for readers. My strength lies in thorough research and presenting information in a structured and logical format.

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