Open Source Meets Hardware: Open Processor Core
SiFive, the first fabless provider of customized, open-source-enabled semiconductors, had recently announced the availability of its Freedom Everywhere 310 (FE310) system on a chip (SoC), the industry’s first commercially available SoC based on the free and open RISC-V instruction set architecture.
The Freedom E310 (FE310) is the first member of the Freedom Everywhere family of customizable SoCs. Designed for microcontroller, embedded, IoT, and wearable applications, the FE310 features SiFive’s E31 CPU Coreplex, a high-performance, 32-bit RV32IMAC core. Running at 320+ MHz, the FE310 is among the fastest microcontrollers in the market. Additional features include a 16KB L1 Instruction Cache, a 16KB Data SRAM scratchpad, hardware multiply/divide, a debug module, flexible clock generation with on-chip oscillators and PLLs, and a wide variety of peripherals including UARTs, QSPI, PWMs, and timers. Multiple power domains and a low-power standby mode ensure a wide variety of applications can benefit from the FE310.
Furthermore, SiFive launched an open source low-cost HiFive1 software development board based on FE310. As part of this availability, SiFive also has contributed the register-transfer level (RTL) code for FE310 to the open-source community.
The Arduino compatible HiFive1 was live on a crowdfunding campaign on Crowdsupply and the board reached around $57,000 funding. Check this video to know more about HiFive1:
SiFive is now fulfilling a dream of a lot of developers: a custom silicon designed just for you! With the RTL code open, chip designers are now able to customize their own SoC on top of the base FE310 by accessing the open source files provided on Github. But don’t worry, even if you don’t have the expertise needed to develop your own core, SiFive is offering a new service called “ chips-as-a-service” that can customize the FE310 to meet your unique needs. All you need is to register here dev.sifive.com, try out your ideas and finally contact the company to finalize the design of your new chip.