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HiFive1, An Open-Source RISC-V Development Kit

Summary of HiFive1, An Open-Source RISC-V Development Kit


SiFive introduces the HiFive1, an open-source RISC-V development board featuring the Freedom E310 SoC. Designed for embedded and IoT applications, this Arduino-compatible board offers high performance at 320+ MHz using the 32-bit RV32IMAC architecture. It supports programming via Arduino IDE or Freedom E SDK and includes substantial flash memory and versatile I/O options for custom silicon chip prototyping.

Parts used in the HiFive1:

  • SiFive Freedom E310 (FE310) Microcontroller
  • SiFive E31 CPU Coreplex
  • 128 Mbit Off-Chip Flash Memory (ISSI SPI Flash)
  • On-chip oscillators and PLLs
  • Debug Module
  • Hardware Multiply/Divide unit
  • microUSB Host Interface
  • DC Jack for 7-12V input
  • Arduino IDE Software Environment
  • Freedom E SDK Software Environment

By bringing the power of open-source and agile hardware design to the semiconductor industry, SiFive aims to increase the performance and efficiency of customized silicon chips with lower cost.

The Freedom E310 (FE310) is the first member of the Freedom Everywhere SoCs family, a series of customizable microcontroller SoC platforms, designed based on SiFive’s E31 CPU Coreplex CPU for microcontroller, embedded, IoT, and wearable applications. The SiFive’s E31 CPU Coreplex is a high-performance, 32-bit RV32IMAC core. Running at 320+ MHz.

SiFive recently announced the ‘HiFive1’, an open-source Arduino-compatible RISC-V development board that features the FE310 SoC. It is a 68 x 51 mm board consists of 19 Digital I/O pins, 9 PWM pins, and 128 Mbit Off-Chip flash memory. HiFive1 operates at 3.3V and 1.8V and is fed with 5V via USB or with 7-12V DC jack. The board can be programed using Arduino IDE or Freedom E SDK.

HiFive1’s Specifications:
  • Microcontroller: SiFive Freedom E310 (FE310)
    • CPU: SiFive E31 CPU
    • Architecture: 32-bit RV32IMAC
    • Speed: 320+ MHz
    • Performance: 1.61 DMIPs/MHz, 2.73 Coremark/MHz
    • Memory: 16 KB Instruction Cache, 16 KB Data Scratchpad
    • Other Features: Hardware Multiply/Divide, Debug Module, Flexible Clock Generation with on-chip oscillators and PLLs
  • Operating Voltage: 3.3 V and 1.8 V
  • Input Voltage: 5 V USB or 7-12 VDC Jack
  • IO Voltages: Both 3.3 V or 5 V supported
  • Digital I/O Pins: 19
  • PWM Pins: 9
  • SPI Controllers/HW CS Pins: 1/3
  • External Interrupt Pins: 19
  • External Wakeup Pins: 1
  • Flash Memory: 128 Mbit Off-Chip (ISSI SPI Flash)
  • Host Interface (microUSB): Program, Debug, and Serial Communication
  • Dimensions: 68 mm x 51 mm
  • Weight: 22 g

RISC-V is an open source instruction set architecture (ISA) that became a standard open architecture for industry implementations under the governance of the RISC-V Foundation. The RISC-V ISA was originally designed and developed in the Computer Science Division at the University of California to support computer architecture researches and education.

Read more: HiFive1, An Open-Source RISC-V Development Kit

Quick Solutions to Questions related to HiFive1:

  • What is the HiFive1?
    The HiFive1 is an open-source Arduino-compatible RISC-V development board featuring the SiFive Freedom E310 SoC.
  • Can the HiFive1 be programmed using the Arduino IDE?
    Yes, the board can be programmed using either the Arduino IDE or the Freedom E SDK.
  • How fast does the SiFive E31 CPU run on this board?
    The CPU operates at speeds greater than 320 MHz.
  • What type of architecture does the HiFive1 use?
    The board uses a 32-bit RV32IMAC architecture.
  • Does the HiFive1 support external flash memory?
    Yes, it features 128 Mbit of Off-Chip flash memory from ISSI.
  • What are the input voltage options for powering the board?
    The board accepts 5V via USB or 7-12V DC through a jack.
  • How many digital I/O pins are available on the HiFive1?
    The board consists of 19 Digital I/O pins.
  • What is the primary purpose of the RISC-V ISA mentioned in the text?
    RISC-V is an open source instruction set architecture designed to support computer architecture researches and education.

About The Author

Ibrar Ayyub

I am an experienced technical writer holding a Master's degree in computer science from BZU Multan, Pakistan University. With a background spanning various industries, particularly in home automation and engineering, I have honed my skills in crafting clear and concise content. Proficient in leveraging infographics and diagrams, I strive to simplify complex concepts for readers. My strength lies in thorough research and presenting information in a structured and logical format.

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