Summary of BOOST THE SPEED OF YOUR STM32 MICROCONTROLLERS BY 31% USING CORE-COUPLED MEMORY
Core Coupled Memory (CCM) in STM32 microcontrollers provides zero-wait-state, high-performance RAM ideal for real-time and computation-intensive routines. Dim Tass demonstrated using CCM on an STM32F303CC board by running an LZ4 compression benchmark from flash, SRAM, and CCM at 72 MHz and 128 MHz. Results showed CCM markedly reduced execution times (e.g., from ~279–304 ms on flash to 172 ms on CCM at 72 MHz, and to 97 ms on CCM at 128 MHz), highlighting CCM’s advantage for performance-sensitive embedded tasks.
Parts used in the STM32F303CC CCM demo:
- STM32F303CC development board (256 kB flash, 40 kB SRAM, 8 kB CCM)
- LZ4 compression algorithm (firmware benchmark)
- Custom CMake build system to select execution memory (flash, SRAM, CCM)
When working on projects with computation-intensive routines and (or) near real-time performance requirements, having a “lightning-fast” RAM is usually a good thing for developers. This is one of the reasons while STMicro included the Core Coupled Memory (CCM) RAM in a good number of its STM32 microcontroller series, and Dim Tass recently demonstrated how to use it, in a blog post on his website.
Core Coupled Memory (CCM), unlike flash storage, offers high performance and a zero wait-state that allows the execution of instructions at a fraction of the time it takes when running the firmware from flash storage. According to STMicro, it is was included in the microcontrollers for use in scenarios that involve “real-time and computation-intensive routines [including] digital power conversion control loops (switch-mode power supplies, lighting), field-oriented 3-phase motor control, [and] real-time DSP (digital signal processing)”.
Describing CCM, Tass referred to it as potentially one of the features used by STM to set the microcontrollers with it, apart. In his words, “Vendors need to make themselves stand out from their competitors and this is done in many different ways. Of course, the most important is the price, but some times that’s not enough, because even the low price doesn’t mean that the controller fits your project”.
For the demo showcasing how developers can use the CCM, Tass made use of an STM32F303CC development board, which has 256kB of flash storage, 40kB of static RAM (SRAM) and 8kB of Core Coupled Memory(CCM) RAM. For the firmware, he adopted the LZ4 compression algorithm as a benchmark, along with a custom CMake that allows execution on flash SRAM, and CCM RAM. Executing the LZ4 compression algorithm at different clock speeds on the flash, the SRAM, and the CCM. At the default board clock speed of 72MHz and a block size of 8k, executing the LZ4 algorithm from the flash took between 279 and 304 milliseconds. Moving to the SRAM dropped the runtime further to 251ms, but switching to CCM lowered it still further to 172ms. To further test the limits, Tass overclocked the device to get a clock speed of 128MHz and tested the performance of all three memories again. At the new clock speed with the same block size as before, execution time dropped to between 156-171ms on flash memory, 141 on the SRAM, 97ms on the CCM.
Read more: BOOST THE SPEED OF YOUR STM32 MICROCONTROLLERS BY 31% USING CORE-COUPLED MEMORY
- What is Core Coupled Memory used for?
CCM is used for high-performance, zero wait-state execution in real-time and computation-intensive routines such as digital power conversion, motor control, and real-time DSP. - Which microcontroller was used in the demo?
An STM32F303CC development board was used. - How much CCM does the STM32F303CC board have?
The STM32F303CC board used in the demo has 8 kB of CCM. - What benchmark was used to compare memory performance?
The LZ4 compression algorithm was used as the benchmark. - How did execution time on CCM compare to flash at 72 MHz?
At 72 MHz with 8 kB blocks, execution from flash took about 279–304 ms, while execution from CCM took 172 ms. - How did overclocking to 128 MHz affect CCM performance?
At 128 MHz with the same block size, CCM execution time dropped to 97 ms, improving over the 72 MHz result. - Did execution from SRAM improve performance over flash?
Yes, executing from SRAM reduced runtime versus flash (e.g., to 251 ms at 72 MHz and 141 ms at 128 MHz in the demo).
