Summary of ESPRESSIF NEXT GEN ESP32-S2 SOC AND FAMILY GOES INTO MASS PRODUCTION
The ESP32-S2 SoC, announced by Espressif in 2019 and cleared for mass production in February 2020, targets security-focused IoT applications. It features a faster 240 MHz single-core processor, lower internal memory than the original ESP32 but support for external memories, and a RISC-V based ULP coprocessor. Key capabilities include dynamic Wi-Fi power saving, USB support, camera interfaces, and advanced security features like secure boot and flash encryption.
Parts used in the ESP32-S2 Project:
- ESP32-S2 SoC
- Xtensa® 32-bit LX7 single-core processor
- ULP coprocessor (RISC-V architecture)
- External Flash memory
- PSRAM (Pseudo Static Random Access Memory)
- Wi-Fi transceiver
- Cryptographic accelerator hardware
Back in 2019, Espressif announces the launch of ESP32-S2 SoC, which was an upgrade of the regular of ESP32 but targetted for security-focused applications. Unlike the typical ESP32, this new SoC comes with an array of new features. Fasttrack to February 2020, Espressif has announced that the ESP32-S2 SoCs have now been cleared for mass production and will be expecting devices based on the new SoCs coming to market soon.
Unlike the original ESP32, the ESP32-S2 SoC is equipped with a faster 240 MHz Xtensa® 32-bit LX7 single-core processor but comes with 320 KB of SRAM and 128 KB of ROM which is lower than the 520KB of RAM and 448 KB of ROM of the ESP32. Nevertheless, this lower memory might not be an issue, and the S2 SoC supports for its shortcomings by proving support for bigger external memories. Also, the S2 comes with a ULP coprocessor based on the RISC-V architecture. With a single-core processor, the ESP32-S2 has lower power consumption, while maintaining excellent processing capabilities.
The S2 SoC is capable of dynamically turning off its Wi-Fi transceiver when not in use, which will allow it to save an enormous power. Some of its more features are an off the USB support, and it adds a camera interface to the SoCs, also adds the TOF (Time of flight) ranging function of Wi-Fi data packets to improve the accuracy and stability of the wireless range and many more.
The ESP32-S2 was designed to address some of the security challenges with IoT devices. It comes with:
- Secure boot based on the RSA algorithm, which ensures that only trusted software is executed on the chip.
- Flash encryption based on the AES-XTS algorithm, which ensures that user-sensitive configuration data and application code on the external Flash and PSRAM of ESP32-S2 are always encrypted.
- The TLS stack can take advantage of the cryptographic accelerator hardware to improve the cloud connectivity performance.
- The security of ESP32-S2 is specially reinforced, as it resists fault injection attacks from hardware and software, while it also prevents key leakage in voltage failure.
Read more: ESPRESSIF NEXT GEN ESP32-S2 SOC AND FAMILY GOES INTO MASS PRODUCTION
- When was the ESP32-S2 SoC cleared for mass production?
It was cleared for mass production in February 2020. - What processor does the ESP32-S2 use compared to the original ESP32?
It uses a faster 240 MHz Xtensa® 32-bit LX7 single-core processor. - Does the ESP32-S2 have more or less internal memory than the original ESP32?
It has lower internal memory with 320 KB of SRAM and 128 KB of ROM compared to the original. - How does the ESP32-S2 save power when Wi-Fi is not in use?
The S2 SoC can dynamically turn off its Wi-Fi transceiver when not in use. - What new interface support does the ESP32-S2 add?
It adds off-the-shelf USB support and a camera interface. - Which algorithms are used for secure boot and flash encryption?
Secure boot uses the RSA algorithm, while flash encryption uses the AES-XTS algorithm. - Can the ESP32-S2 resist fault injection attacks?
Yes, its security is specially reinforced to resist fault injection attacks from hardware and software. - What function improves the accuracy and stability of the wireless range?
The TOF ranging function of Wi-Fi data packets improves accuracy and stability.
