Novel protection blocks transients on HDMI
The IP4786CZ32 is designed to protect High-Definition Multimedia Interface (HDMI) transmitter host interfaces. It includes HDMI 5 V overcurrent / overvoltage protection, Data Display Channel (DDC) buffering and decoupling, hot plug detect, backdrive protection, Consumer Electronic Control (CEC) buffering and decoupling, and ±8 kV contact ElectroStatic Discharge (ESD) protection for all I/Os in accordance with the IEC 61000-4-2, level 4 standard.
The IP4786CZ32 incorporates Transmission Line Clamping (TLC) technology on the high-speed Transition Minimized Differential Signaling (TMDS) lines to simplify routing and help reduce impedance discontinuities. All TMDS lines are protected by an impedance-matched diode configuration that minimizes impedance discontinuities caused by typical shunt diodes.
The enhanced 60 mA overcurrent / overvoltage linear regulator guarantees HDMI-compliant 5 V output voltage levels with up to 6.5 V inputs.
The DDC lines use a new buffering concept which decouples the internal capacitive load from the external capacitive load for use with standard Complementary Metal Oxide Semiconductor (CMOS) or Low Voltage Transistor-Transistor Logic (LVTTL) I/O cells down to 1.8 V. This buffering also redrives the DDC and CEC signals, allowing the use of longer or cheaper HDMI cables with a higher capacitance. The internal hot plug detect module simplifies the application of the HDMI transmitter to control the hot plug signal.
Features and benefits
- HDMI 1.3a and 1.4, 340 MHz pixel clock, deep color and HDMI Ethernet and Audio return Channel (HEAC) compatible
- Pb-free, Restriction of Hazardous Substances (RoHS) compliant and free of halogen and antimony (Dark Green compliant)
- Robust ESD protection without degradation after repeated ESD strikes
- Impedance matched 100 Ω differential transmission line ESD protection for TMDS lines (±10 Ω). No Printed-Circuit Board (PCB) pre-compensation required
- All external I/O lines with ESD protection of at least ±8 kV in accordance with the IEC 61000-4-2, level 4 standard
- DDC capacitive decoupling between system side and HDMI connector side and buffering to drive cable with high capacitive load (> 700 pF/25 m)
- Hot plug detect module
- CEC buffering and isolation, with integrated backdrive-protected 26 kΩ pull-up
- Simplified flow-through routing utilizing less overall PCB space
- Highest integration in a small footprint, PCB level, optimized RF routing, 32-pin HVQFN leadless package
NXP has developed distributed transmission line-based transient protection to maintain 3.4Gbit/s bandwidth – 2160p 3D HDMI video – through its HDMI interface buffer chip.
The chip, the IP4786CZ32, is aimed at digital video sources such as set-top boxes, notebooks and Blu-ray disc players.
Connecting between the unit’s digital SoC and its output socket, it protects every line on the connector and both buffers and level-shifts where appropriate.
“The challenge is that at high speeds it is very important to have matched impedances along the entire signal path,” NXP marketing director Joe Salvador told Electronics Weekly.
The video data has the widest bandwidth, passing along the ‘TMDS’ bus – four pairs of LVDS (low-voltage differential signalling) data lines.
Although they require no buffering or level shifting, they do need transient protection.
Typically, without a protection chip, this would be handled using discrete transient suppressor directly on the PCB, said Salvador (see single diode diagram below), but even this simple arrangement has issues at 2160p 3D data rates.
“You need to offset the capacitance of the diode,” he said. “You can either add a common-mode choke outside the diode package, or narrow the trace near the diode to increase inductance, or etch-out the ground plane under the diode package to raise impedance. All offset the capacitance.”
Using these approaches, signal integrity is vulnerable to changes to the PCB, for example stack order or layer thickness variations.
For more read: Novel protection blocks transients on HDMI
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