Adding to its high current system chipset portfolio, Infineon claims to offer the industry’s first 16-phase digital PWM multiphase controller.
The XDPE132G5C extends the existing portfolio which enables currents of 500 to 1000A and above for next generation CPUs, GPUs, FPGA and ASICs used in artificial intelligence (AI) and 5G datacomms applications.
It has been introduced as CPU current requirements increase to enable next-generation AI and networking workloads, DC/DC voltage regulators to deliver more than 500A to the load. The XDPE132G5C has a true 16-phase digital PWM engine and an improved advanced transient algorithm to address these high phase count requirements, says Infineon. The true active current sharing between phases enables a reliable, compact and cost-saving design, with no need for extra logic doubler ICs.
The XDPE132G5C offers fine V out setting in 0.625mV increments to meet the demands of ASICs and FPGAs of V out control in less than 1mV steps, seen in communication systems today. The XDPE132G5C also supports auto-restart for communications with options to reduce remote site maintenance following power or system glitches.
The XDPE132G5C is packaged in a 7.0 x 7.0mm 56-pin QFN to accommodate 16 phases. It employs a full digital and programmable load line and is PMBus 1.3/AVS-compliant.
Infineon advises that it can be paired with TDA21475, the thermally efficient integrated current sense power stage, to efficiently deliver over 1000A.
The 70A-rated TDA21475 power stage is housed in a 5.0 x 6.0mm package. It provides efficiency of more than 95 per cent. The exposed top significantly reduces the R th(j-top) from 19 degrees C/W in the over-moulded package to 1.6 degrees C/W. This removes heat from the top of the package, for voltage regulator power density and optimal phase count and footprint. The TDA21475 also offers smart over-current and over-voltage protection and delivers temperature and current information to the XDPE132G5C controller.
Read more: INFINEON CLAIMS INDUSTRY’S FIRST TRUE 1000A VOLTAGE REGULATOR FOR AI