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NXP shrinks power transistor design for mobiles

Summary of NXP shrinks power transistor design for mobiles


NXP launched the PMPB40SNA, a compact 60V N-channel MOSFET in a 2x2mm DFN2020MD-6 package. This industry-first component features wettable flanks for easy optical solder inspection and offers a 7x size reduction over SO-8 packages while maintaining AEC-Q101 automotive qualification. Additionally, NXP introduced medium-power transistors in a 3-pin leadless DFN2020-3 package, saving up to 80% PCB space compared to SOT89. These devices support applications like relay drivers and mobile charging circuits with high thermal efficiency.

Parts used in the PMPB40SNA Project:

  • PMPB40SNA 60 V N-channel MOSFET
  • DFN2020MD-6 (SOT1220) Package
  • Tin-plated side pads
  • Exposed drain pad
  • 4-layer PCB
  • DFN2020-3 (SOT1061) Package

NXP has just released its new PMPB40SNA, a 60 V, 40 mΩ N-channel automotive MOSFET in a compact 2 x 2 mm DFN2020MD-6 (SOT1220) package. The DFN2020MD-6 is an industry first, featuring 100% wettable and therefore solderable flanks (side pads). This makes soldering and inspection much easier and is aligned with the automotive optical solder inspection requirements! It is the perfect space-saving solution, about a factor 7 smaller compared to SO-8 and at the same time, delivers robust automotive qualified high performance.

PMPB40SNA is one of 80 recently released MOSFETs in leadless 2 x 2 mm single, dual and 1 x 0.6 mm single DFN packages. The portfolio contains P- and N-Channel types from 12 to 60 V with very low RDSON values, automotive qualified and ESD protected types. Learn more and order your samples today!

Features and benefits

  • 60 V, 40 mΩ single N-channel Trench MOSFET
  • Small and leadless ultra thin SMD plastic package DFN2020MD-6: 2 x 2 x 0.65 mm
  • Exposed drain pad for excellent thermal conduction leading to a power dissipation of 1.5 W
  • Tin-plated, 100% “wettable flanks” for optical solder inspection
  • AEC-Q101 qualified

Key applications

  • Relay driver
  • High-speed line driver
  • Low-side load switch
  • Switching circuits

NXP shrinks power transistor design for mobiles

NXP Semiconductors has introduced its first medium power transistors in a 2-mm x 2-mm 3-pin leadless DFN package.

Targetted at general-purpose power-sensitive applications in mobile, automotive, industrial and household appliances, the DFN2020-3 (SOT1061) packaging can save up to 80% more space on the PCB compared to conventional SOT89 packages, while maintaining high electrical performance of up to 2A, according to the supplier.

These miniature devices are designed for energy efficiency and low heat dissipation. When mounted on a 4-layer PCB, the thermal performance is designed to match that of  larger SMD packages and allows Ptot levels of up to 1.1 W in a tiny footprint.

“With our latest miniaturized medium power transistor, we continue to drive the market in compact components and in high performance low VCEsat transistors,” said Joachim Stange, product manager, NXP Semiconductors.

All NXP medium power transistors are automotive-qualified according to AEC-Q101.

“In charging circuits of mobile devices and automotive electronics requiring smaller ICs, designers can now choose a medium power solution and not have to trade off PCB space for functionality. Simple applications such as interior car lighting which require only 1-2W can be powered by an ultra-compact medium power solution,” said Stange.

The medium power transistors have a VCEO ranging from 20V to 80V.

 

For more read: NXP shrinks power transistor design for mobiles

Quick Solutions to Questions related to PMPB40SNA:

  • What is the primary benefit of the DFN2020MD-6 package?
    The package features 100% wettable flanks that make soldering and optical inspection easier.
  • How much smaller is the PMPB40SNA compared to an SO-8 package?
    The new device is approximately seven times smaller than the SO-8 package.
  • Does the PMPB40SNA meet automotive quality standards?
    Yes, the device is qualified according to AEC-Q101 standards.
  • What is the maximum power dissipation for the PMPB40SNA?
    The exposed drain pad allows for a power dissipation of 1.5 W.
  • Can the DFN2020-3 package save significant PCB space?
    Yes, it can save up to 80% more space on the PCB compared to conventional SOT89 packages.
  • What is the maximum total power dissipation for the medium power transistors on a 4-layer PCB?
    The devices allow Ptot levels of up to 1.1 W when mounted on a 4-layer PCB.
  • Are these transistors suitable for interior car lighting applications?
    Yes, they are designed for simple applications like interior car lighting requiring only 1-2W.
  • What voltage range do the NXP medium power transistors cover?
    The medium power transistors have a VCEO ranging from 20V to 80V.

About The Author

Ibrar Ayyub

I am an experienced technical writer holding a Master's degree in computer science from BZU Multan, Pakistan University. With a background spanning various industries, particularly in home automation and engineering, I have honed my skills in crafting clear and concise content. Proficient in leveraging infographics and diagrams, I strive to simplify complex concepts for readers. My strength lies in thorough research and presenting information in a structured and logical format.

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