Summary of High current and Toshiba combines 130nm logic for motor drives
Toshiba's new BiCD process integrates 130nm logic with power handling for sensorless BLDC motor drives and automotive ICs. Combining Bipolar, CMOS, and LDMOS technologies with deep trench isolation, it supports up to 60V operation, low leakage at high temperatures, and excellent efficiency. This platform enables smaller, more reliable controllers with reduced manufacturing costs compared to SOI processes, targeting industrial and automotive applications like HVAC systems.
Parts used in the Toshiba BiCD Process Project:
- 130nm logic design rule
- Bipolar base technology
- CMOS base technology
- LDMOS base technology
- Deep trench isolation
- Heatsink QFP (HQFP) package
- QFN package
- Wafer-level Chip-Scale Packages (WCSP)
Advanced integrated logic/power process optimises power handling, efficiency and intelligence for combined driver-controller applications.
Düsseldorf, Germany, 16 th November, 2010 – Toshiba Electronics Europe has revealed details of its new BiCD process, which combines 130nm logic design rule with current-handling capability to permit unprecedented integration in devices such as sensorless BLDC motor drives. The process is able to guarantee full specification over a wide temperature range, as well as high ESD robustness, providing a platform for a variety of industrial and automotive IC projects.
The process combines Bipolar, CMOS and LDMOS base technologies with deep trench isolation. This results in high voltage capability, up to 60V, with greatly reduced leakage currents, especially at high temperatures. By also achieving low on-resistance (RDS(ON)A), 32mΩ・mm 2 for 40V, 70mΩ・mm 2 for 60V, the new process delivers outstanding power-handling efficiency as well as high integration of control and bus-interface functions using its 130nm CMOS technology.
Supporting the new process, Toshiba also has high-density power package technologies such as Heatsink QFP (HQFP), QFN, and Wafer-level Chip-Scale Packages (WCSP)
Toshiba’s 130nm BiCD process is available for commercial custom IC development. It will also provide the foundation for forthcoming families of Toshiba automotive ICs implementing LIN nodes for a variety of motor-control applications such as various HVAC functions.
Thomas Kuschel, senior manager, microcomputer, automotive & consumer IC marketing, Toshiba Electronics Europe, said, “The combination of 130nm design rule and high current- handling capability will enable smaller, more reliable and intelligent controllers. Manufacturing costs are also lower than for a comparable Silicon On Insulator (SOI) process. In the automotive marketplace, these advantages will translate into improvements such as greater fuel economy and comfort, as well as cost savings.”
For moe detail: High current and Toshiba combines 130nm logic for motor
- What capabilities does the new BiCD process combine?
The process combines 130nm logic design rule with current-handling capability. - How does the process handle voltage requirements?
It provides high voltage capability of up to 60V. - Does the process maintain performance at high temperatures?
Yes, it guarantees full specification over a wide temperature range with greatly reduced leakage currents. - What are the specific on-resistance values achieved?
It achieves 32mΩ・mm² for 40V and 70mΩ・mm² for 60V. - Which package technologies support this process?
Supporting technologies include Heatsink QFP, QFN, and Wafer-level Chip-Scale Packages. - Can this process be used for commercial custom IC development?
Yes, the 130nm BiCD process is available for commercial custom IC development. - What automotive application is highlighted for future implementation?
It will provide the foundation for LIN nodes for various motor-control applications like HVAC functions. - How do manufacturing costs compare to Silicon On Insulator processes?
Manufacturing costs are lower than for a comparable Silicon On Insulator process.
