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Optocoupler speed-up also reduces power consumption

Summary of Optocoupler speed-up also reduces power consumption


This article presents a circuit design that accelerates standard optocoupler response times by modifying the LED drive side. By incorporating an NPN emitter follower and a capacitor, the turn-on speed is significantly improved while allowing for higher resistance values to reduce power consumption. The design uses specific components to manage charging and discharging cycles, ensuring minimal output overshoot and protecting junctions during signal transitions.

Parts used in the Optocoupler Speed-Up Project:

  • Resistor R1
  • NPN transistor Q1
  • Emitter resistor REL (low-value part)
  • Emitter resistor REH (high-value part)
  • Capacitor C
  • Schottky diode D1
  • Schottky diode D2

Standard optocoupler speed is limited mainly by the relatively slow response of the phototransistor. This Design Idea adds components to the LED drive side to speed things up.

R1 is the original LED resistor, as used before the extra circuitry was added.

Here however, its value can be higher, as the turn-on speed is determined mainly by the added circuit. You can thus save power, and also drive the LED with a less powerful driver.

Optocoupler speed-up also reduces power consumption

The turn-on speed-up device is an emitter follower, NPN transistor Q1. The emitter follower has its emitter resistor split into a low-value part REL, and a higher-value part REH which is paralleled with capacitor C. At a steep rise of input voltage VIN, the initially uncharged capacitor C temporarily “shorts” REH. Thus, the emitter current flowing through the LED has an increased value of:

Current IE should not exceed 50mA. For a step VIN, the capacitor C charges roughly exponentially with a time constant of τ = RELC. The value of capacitor C had been initially determined using:

where tr0 is the risetime at output of the bare optocoupler.

The obtained value of 13nF results in excessive overshot of output VOUT however. The proper value of C was therefore determined

experimentally to optimally be 1.5nF, which results in a negligible 2% overshoot of VOUT. Schottky diodes D1 & D2 serve for fast discharging of the capacitor C for an input falling-edge, and simultaneously for suppressing reverse bias at the base-emitter junction of Q1 and the LED.

 

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Quick Solutions to Questions related to Optocoupler Speed-Up Project:

  • How does this design improve optocoupler speed?
    The turn-on speed is determined mainly by an added emitter follower circuit rather than the original phototransistor response.
  • Can I increase the value of resistor R1?
    Yes, its value can be higher because the turn-on speed is now determined by the added circuitry.
  • What is the function of capacitor C?
    It temporarily shorts the high-value emitter resistor REH during steep input voltage rises to increase LED current.
  • What is the optimal experimental value for capacitor C?
    The proper value determined experimentally is 1.5nF to result in negligible 2% overshoot.
  • Do Schottky diodes D1 and D2 serve any other purpose besides discharging?
    Yes, they also suppress reverse bias at the base-emitter junction of Q1 and the LED.
  • What limits the emitter current in this circuit?
    Current IE should not exceed 50mA.
  • Why was the initial calculated capacitor value of 13nF rejected?
    It resulted in excessive overshoot of the output VOUT.
  • Does this modification help with power consumption?
    Yes, it allows saving power and driving the LED with a less powerful driver.

About The Author

Ibrar Ayyub

I am an experienced technical writer holding a Master's degree in computer science from BZU Multan, Pakistan University. With a background spanning various industries, particularly in home automation and engineering, I have honed my skills in crafting clear and concise content. Proficient in leveraging infographics and diagrams, I strive to simplify complex concepts for readers. My strength lies in thorough research and presenting information in a structured and logical format.

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