The use of low-dropout regulators, popularly known as LDOs, is common in many applications today because they provide a simple and inexpensive way to regulate an output voltage that is stepped-down from a higher input voltage. In addition, linear LDO voltage regulators contribute very-low noise as compared to switching regulators.
Nonetheless, to keep system power consumption low, such regulators must also feature ultra-low quiescent current (IQ) while providing excellent dynamic performance to ensure a stable, noise-free voltage rail, suitable for driving IC loads such as microprocessors, FPGAs, and other devices on the system board.
In reality, ultra-low IQ and good dynamic response characteristics do not go hand-in-hand. In fact, two similar LDOs with identical IQ current specs can differ considerably in terms of dynamic performance. According to an ON Semiconductor application note,¹ these two requirements are often mutually exclusive and pose a real challenge to power-IC designers. Consequently, not many LDOs available on the market can satisfy both of these requirements simultaneously.
Biasing ultra-low-IQ LDOs
According to ON Semi, the two main factors influencing the dynamic performance of an ultra-low-IQ LDO regulator are the process technology used to fabricate the device and the associated circuit design. While an advanced process such as CMOS or BiCMOS can be optimized for low power consumption and high-speed performance of the power device, the dynamic performance is dependent on the circuit design. Combining these two techniques, ON Semiconductor’s power-IC designers have accomplished a lot more. Besides delivering ultra-low IQ with excellent line and load transients, available LDOs also feature ultra-low output noise and high power supply rejection ratio (PSRR) characteristics.
Similar advances have also been made by other suppliers including Linear Technology Corp., Maxim Integrated Products, and Texas Instruments, to name just a few. To address a variety of battery-powered mobile applications, these LDO suppliers have crafted ultra-low-IQ LDOs with high PSRR, ultra-low noise and fast transient response characteristics.
Traditionally, ultra-low-IQ CMOS LDOs use a constant biasing scheme to keep ground current (IGND) consumption relatively constant across the available range of output currents. By definition, IQ defines IGND. ON Semiconductor’s MC78LC is a good example of such a device, featuring an IGND (or IQ) of 1.5 µA. The primary disadvantage of constant biasing is relatively poor dynamic performance, namely load and line transients, PSRR, and output noise, as ON Semi engineers report in the application note. ON Semi suggests tweaking this performance using larger output capacitors. Figure 1 shows LDO MC78LC’s load-transient overshoot and undershoot are improved by increasing the output capacitor (COUT) from 1 to 100 µF.
Figure 1: MC78LC’s load-transient overshoot and undershoot are significantly improved by increasing the output capacitor (COUT) from 1 to 100 µF.
Table 1 depicts precisely the overshoot and undershoot amplitudes for three different output capacitor values. It can be seen that the transient amplitude was greatly reduced by using a larger 100 µF output capacitor.
For more detail: Selecting the Right Ultra-Low Quiescent-Current LDO Regulator