Summary of DC/DC Converter Topologies and Techniques to Obtain High Boost Ratios
This article discusses high-voltage DC/DC boost converters designed to generate voltages several times higher than low battery inputs, targeting applications like APD biasing and flash cameras. It reviews traditional topologies—simple boost, charge-pump multiplied boost, and tapped-inductor boost—highlighting their drawbacks such as high stress, losses, and EMI. The text introduces an improved topology from Analog Devices that minimizes voltage and current stress, allowing for efficient operation with moderate-duty components while avoiding leakage inductance issues.
Parts used in the High Boost Ratio DC/DC Converter Project:
- MOSFET Q1
- Rectifier (Schottky diode)
- Charge-pump multiplier stage
- Pump capacitors
- Tapped inductor
- Snubbers
Whether it is used for biasing avalanche photodiodes (APDs) found in optical receivers, driving photoflash tubes in flash cameras, or charging high-voltage capacitors, the need for high-voltage sources continues to grow. Consequently, in battery-powered units where the input supply voltage is low, step-up or boost DC/DC converters are required to generate voltages that can be several times the input. To address these requirements, suppliers such as Analog Devices, Linear Technology, Maxim Integrated, and Micrel Inc., among others, have produced boost converters with output voltages at 70 V and above.
This article examines such solutions and discusses the topologies and techniques used by each to boost output voltages by ratios of 10:1 or better in order to generate high-DC voltages from very-low DC inputs.
High boost ratios
According to Analog Devices’ application note AN-1126,¹ there are several DC/DC converter topologies for obtaining relatively high (>10:1) boost ratios. These include simple boost, charge-pump multiplied boost, and tapped-inductor boost, as shown in Figure 1. While there are many advantages delivered by each topology, these techniques also have noteworthy drawbacks for delivering significant power at large boost ratios.
Figure 1: Traditionally, topologies for obtaining relatively high (>10:1) boost ratios include simple boost (a), charge-pump multiplied boost (b), and tapped-inductor boost (c) (Courtesy of Analog Devices).
Per ADI’s application note, with high boost ratios, simple boost imposes both high-voltage and high-current stress on MOSFET Q1, which results in high switching and conduction losses. High voltage on the rectifier also prevents the use of efficient Schottky diodes. Similarly, with charge-pump multiplied boost topology each charge-pump multiplier stage requires two added series diodes, which contribute to loss from forward-voltage drop. In addition, the pump capacitors must be large in value to avoid causing high peak currents and significant cyclic droop. High peak currents also are likely to increase rms switch current, which tends to corrupt current-mode control waveforms.
With tapped-inductor boost topology, the voltage stress on the output rectifier is high, and it suffers from the effects of transformer leakage inductance, according to ADI. This leakage inductance causes voltage spikes and ringing, which, in turn, causes EMI and increases voltage stress on both the MOSFET and the output rectifier. Although such effects can be controlled with snubbers, it wastes power and results in additional components and board space.
Improved topology
ADI’s application note AN-1126 proposes a new converter topology that overcomes the drawbacks of conventional topologies to deliver significant power at large boost ratios with minimum voltage and current stress imposed on the switches. This allows moderately rated MOSFETs and Schottky rectifiers to be used while operating at moderate duty cycles for easier continuous-conduction-mode (CCM) and PWM control. Additionally, it avoids voltage spikes and ringing associated with transformer leakage inductance.
For more detail: DC/DC Converter Topologies and Techniques to Obtain High Boost Ratios
- What are the main DC/DC converter topologies for obtaining high boost ratios?
The main topologies include simple boost, charge-pump multiplied boost, and tapped-inductor boost. - How does a simple boost topology affect MOSFET Q1 at high boost ratios?
It imposes both high-voltage and high-current stress on the MOSFET, resulting in high switching and conduction losses. - Why can't efficient Schottky diodes be used in simple boost topologies with high boost ratios?
High voltage on the rectifier prevents the use of efficient Schottky diodes. - What causes loss in charge-pump multiplied boost topologies?
Each charge-pump multiplier stage requires two added series diodes which contribute to loss from forward-voltage drop. - What is required to avoid high peak currents in pump capacitors?
The pump capacitors must be large in value to avoid causing high peak currents and significant cyclic droop. - What negative effects does transformer leakage inductance cause in tapped-inductor boost topologies?
It causes voltage spikes and ringing, which leads to EMI and increases voltage stress on the MOSFET and output rectifier. - How does the improved topology proposed by ADI benefit switch ratings?
It allows moderately rated MOSFETs and Schottky rectifiers to be used while operating at moderate duty cycles. - Does the improved topology suffer from voltage spikes associated with transformer leakage inductance?
No, it avoids voltage spikes and ringing associated with transformer leakage inductance.
