The ADAU1966 is a high performance, single-chip DAC that provides sixteen digital-to-analog converters (DACs) with differential output using the Analog Devices, Inc. patented multi-bit sigma-delta (Σ-Δ) architecture. An SPI/I2C port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1966 operates from 2.5 V digital and 3.3V or 5V analog supplies. A linear regulator is included to generate the digital supply voltage from the analog supply voltage. The ADAU1966 is available in an 80-lead LQFP package.
The ADAU1966 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from an external LR (Frame) clock, MCLK, or from an external crystal, the ADAU1966 can eliminate the need for a separate high frequency master clock and can also be used with a without a bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 2.5 V digital supplies, power consumption is minimized and the digital waveforms are a smaller amplitude, further reducing emissions.
FEATURES and BENEFITS
- PLL generated or direct master clock
- Low EMI design
- 118 dB DAC dynamic range and SNR
- −98 dB THD + N
- 2.5V digital and 3.3V or 5 V analog and IO supply
- 232mW Total Quiescent Power at AVDD=3.3V
- Linear regulator driver to generate digital supply
- Supports 24-bits and 32 kHz to 192 kHz sample rates
- Low-Latency 192kHz sample rate mode
- Differential DAC output
- Log volume control with autoramp function
- Temperature sensor with digital readout +/- 3˚C accuracy
- SPI and I2C controllable for flexibility
- Software-controllable clickless mute
The 24-bit ADAU1966 16-channel audio D/A converter provides 118dB-SNR (signal-to-noise ratio) performance at 32kHz to 192kHz sampling rates.
Its 118dB SNR performance is achieved with a lowest in class power consumption of less than 300mW for 16-channel operation by running the digital portion of the device at a lower voltage.
The digital supply can be generated on chip via a linear regulator allowing the chip to operate off a single analog supply. Alternatively, the regulator can be bypassed and a separate 2.5V to 3.3V supply provided to the chip.
Operating the ADAU1966 with full-scale differential output voltage of 3 Vrms reduces the need for downstream gain and preserves a high SNR against electrically-coupled system noise.
By using the A/D converter’s on-board PLL (phase-locked loop) to derive the internal master clock from an external left/right clock, the chip is designed to eliminate the need for a separate high frequency master clock and can be used with or without a bit clock.
It is qualified for AEC-100 automotive applications and operates at a -40° C to +105° C temperature range. It also features an SPI/I2C port which allows an external microcontroller to adjust volume and read the chip temperature to within +/-3°C.
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