Summary of Glocal Unichip makes cost-effective, low-power server ASIC
Global Unichip (GUC) and TSMC developed a remote management controller ASIC for server and desktop virtualization using the first DDR3/4 PHY on TSMC's 40LP process. This collaboration achieved cost-effective performance by combining GUC's high-speed interface IP with precise simulation flows. The solution supports multiple oxide memory I/O designs, enabling low power operation and faster boot times through self-training features for both AST2500 server and AST3200 desktop SoCs.
Parts used in the Server and Desktop Virtualization ASIC:
- DDR3/4 PHY targeting TSMC’s 40LP process technology
- ASPEED AST2500 server SoC series
- ASPEED AST3200 Desktop Virtualization SoC
- GUC IGADDRS03A DDR3/4 PHY high speed interface IP
- Condensed package substrate
- PCB
Global Unichip, TSMC’s design arm, has made a remote management controller ASIC for server and desktop virtualization by adopting the first DDR3/4 PHY targeting TSMC’s 40LP process technology.
“The complexity of today’s server market is absolutely astounding. Performance was once king but today server SoC’s must also provide cost-effective performance. The innovation required to achieve this sweet spot, particularly at a 40nm manufacturing node requires real technical and business creativity and collaboration,” says GUC CEO Jim Lai.
GUC’s DDR 3/4 PHY is the first to be manufactured in 40nm process technology and provides low power, high performance and cost-effectiveness. GUC offers DDR3/4 PHY and controller production-proven turnkey solutions for all of TSMC’s most advanced process nodes including 40nm LP, 28nmHPM and 16nmFF+.
During the design and production process, engineers from both companies faced performance and time-to-market challenges. On the design side, the new device, the ASPEED’s AST2500 server SoC series and AST3200 Desktop Virtualization SoC had to achieve world- class performance on a cost-effective technology.
Key to success was designing to the performance sweet spot of GUC’s DDR3/4 high speed interface IP, a condensed package substrate, and a PCB through a precise DDR system simulation flow and measurement correlation.
The GUC IGADDRS03A DDR3/4 PHY high speed interface IP was implemented with a multiple oxide memory I/O design that capitalized on the combo DDR3 and DDR4 low power and high speed operation. The IP supports user-friendly PHY self training that shortens first system boot up time and reduces engineering resources.
For more detail: Glocal Unichip makes cost-effective, low-power server ASIC
- What process technology does the new DDR3/4 PHY use?
The device uses TSMC’s 40LP process technology. - Which companies collaborated on this project?
Global Unichip and TSMC worked together on the design. - How does the IP improve system boot time?
The IP supports user-friendly PHY self training that shortens first system boot up time. - What specific SoC series are mentioned for servers?
The ASPEED AST2500 server SoC series is used for this application. - Can the solution support different memory types?
Yes, it capitalizes on combo DDR3 and DDR4 low power and high speed operation. - What other process nodes does GUC offer solutions for?
GUC offers solutions for 28nmHPM and 16nmFF+ nodes. - Why was a condensed package substrate chosen?
It was part of the design to achieve world-class performance at a cost-effective technology sweet spot.
